Five Minute VHDL Podcast: Recent Episodes
Francesco Richichi
How I can parallelize a RAM in FPGA
https://surf-vhdl.com/how-to-implement-a-multi-port-memory-on-fpga/
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Learn how to optimize a multiplier in particular cases:
For a technical analysis go to the post:
https://surf-vhdl.link/OptimizationVhdl12b25
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Link to the post:
https://surf-vhdl.link/99990
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
In this podcast we will understand how to connect a clock signal to our FPGA
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
What is dithering?
Where we can use this technique?
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
VHDL Generic
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Even if the VHDL is not a software language, we can find a tyoica SW statement, the iterative statement. Let’s see how to use this
https://t.me/SurfVhdl/92
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Let’s understand how to implement a conditional statement in VHDL
image for the episode
http://t.me/SurfVhdl/86
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Wait Statements in VHDL
Reference to pictures:
https://t.me/SurfVhdl/82
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Q&A#07- What is the first thing that a recruiter does?
When a recruiter needs to hire you as VHDL expert, what do you think he or she will do to understand if you are good for him or her?
What can you do in order to result a VHDL user?
Let’s see in this podcast.
Here you can find the feedback of my VHDL student
https://surf-vhdl.link/vhdl-student
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
And now is time to introduce formally a Process
link to the images
https://t.me/SurfVhdl/78
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
I receiver a question from Sandip. He got my reference, from my post on DDS.
The question is:
“I want to generate Square of 999kHz, 1000kHz and 1001kHzin VHDL Language and that would be implemented on a Zynq ZC702 evaluation board.
Is it possible by using the DDS.? Can you provide your expertise and comment on it.”
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
VHDL Packages
http://t.me/SurfVhdl/74
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
After signal introduction, let's view what are the remaining VHDL objects
Images
https://t.me/SurfVhdl/72
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
I received a question from Haitham. He have to connect a computer to an FPGA using USB connection in order to transfer data from FPGA to the PC.
Haitham is following my VHDL course “Start Learning VHDL Using FPGA”. In this course the last LAB implement communication between PC and FPGA using UART channel.
After starting the course, Haitham asked me: “Does the USB transfer work as UART”?
Let’s see the answer. Here the link to the picture on the telegram channel
https://t.me/SurfVhdl/68
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
In this Q&A episode I want to answer to the question on what is the VHLD design flow
To better follow the episode, see the picture on the telegram channel
https://t.me/SurfVhdl/65
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Introducing Flip-Flop in VHDL
Link to the picture in the telegram channel
https://t.me/SurfVhdl/61
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
This is the question many of you ask me very often
I wish to give you some hint and a test bench template I use in my VHDL designs
Here the link to the test bench template: https://t.me/SurfVhdl/58
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
A brief overview to setup a ModelSim simulation environment
Link to the episode#12 picture
t.me/SurfVhdl/53
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Introduce signal in VHDL, what is a signal and how to use it.
Image relative to this episode
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Solving a dispute in VHDL: the resolution function
Link to image for the episode#10
Solving a dispute in VHDL: the resolution function
t.me/SurfVhdl/50
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
What is a driver in VHDL?
Images for the episode
t.me/SurfVhdl/46
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
In this brief episode I want to answer a question from Klajdi on simulation of SPI controller using Vivado
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Answering to Prashant. He asked me this question
“What do we have to give as an input for i_clk and i_addr?”
relative to the post:
https://surf-vhdl.com/how-to-generate-sine-samples-in-vhdl/
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com/
In this episode we will introduce the Concurrency concept
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Introducing Entity. The basic building VHDL block
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Let’s understand how digital electronics help us in the debug and test of our design
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Learn how men and women can be identified as digital circuits
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com/
Why do we use only two logic level in digital design?
Figures:
https://t.me/SurfVhdl/32
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Let's introduce the FLAT and Hierarchical methodology in Hardware Design
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Start understanding few rules for a good VHDL design habits
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Do you like digital electronic?
Why you should learn VHDL?
Let's understand in this episode
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Episode zero to introduce the Surf-VHDL Podcast:
Five Minute VHDL
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/couses
Music by Francis Preve - https://www.francispreve.com/